deleted contracts on register app node #6
| @ -37,8 +37,8 @@ message NewAppReq { | |||||||
| 
 | 
 | ||||||
| message AppResource { | message AppResource { | ||||||
|   uint32 memory_mb = 1; |   uint32 memory_mb = 1; | ||||||
|   uint32 disk_mb = 2; |   uint32 disk_size_gb = 2; | ||||||
|   uint32 vcpu  = 3; |   uint32 vcpus  = 3; | ||||||
|   repeated uint32 ports = 4; |   repeated uint32 ports = 4; | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
|  | |||||||
| @ -6,8 +6,8 @@ use serde::{Deserialize, Serialize}; | |||||||
| #[derive(Debug, Clone, Serialize, Deserialize, PartialEq, Default)] | #[derive(Debug, Clone, Serialize, Deserialize, PartialEq, Default)] | ||||||
| pub struct Resource { | pub struct Resource { | ||||||
|     pub memory_mb: u32, |     pub memory_mb: u32, | ||||||
|     pub disk_mb: u32, |     pub disk_size_gb: u32, | ||||||
|     pub vcpu: u32, |     pub vcpus: u32, | ||||||
|     pub port: Vec<u32>, |     pub port: Vec<u32>, | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
| @ -15,8 +15,8 @@ impl From<AppResource> for Resource { | |||||||
|     fn from(pb_val: AppResource) -> Self { |     fn from(pb_val: AppResource) -> Self { | ||||||
|         Self { |         Self { | ||||||
|             memory_mb: pb_val.memory_mb, |             memory_mb: pb_val.memory_mb, | ||||||
|             disk_mb: pb_val.disk_mb, |             disk_size_gb: pb_val.disk_size_gb, | ||||||
|             vcpu: pb_val.vcpu, |             vcpus: pb_val.vcpus, | ||||||
|             port: pb_val.ports, |             port: pb_val.ports, | ||||||
|         } |         } | ||||||
|     } |     } | ||||||
| @ -25,8 +25,8 @@ impl From<Resource> for AppResource { | |||||||
|     fn from(val: Resource) -> AppResource { |     fn from(val: Resource) -> AppResource { | ||||||
|         AppResource { |         AppResource { | ||||||
|             memory_mb: val.memory_mb, |             memory_mb: val.memory_mb, | ||||||
|             disk_mb: val.disk_mb, |             disk_size_gb: val.disk_size_gb, | ||||||
|             vcpu: val.vcpu, |             vcpus: val.vcpus, | ||||||
|             ports: val.port, |             ports: val.port, | ||||||
|         } |         } | ||||||
|     } |     } | ||||||
|  | |||||||
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