Fix two cpuid bugs
1. >> has higher precedence than &. Use parentheses to conduct & first; 2. In the latest Intel software developer's manual, cpuid leaf 06H EDX is related to the logical processor.
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@ -81,7 +81,7 @@ impl CpuIdCache {
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// EDX Bit 00: Reserved.
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// EDX Bit 00: Reserved.
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// Bit 01: Supports L3 Cache Intel RDT Monitoring if 1.
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// Bit 01: Supports L3 Cache Intel RDT Monitoring if 1.
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// Bits 31 - 02: Reserved.
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// Bits 31 - 02: Reserved.
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0xF => cpuid_result.edx & 0x0000_0002 >> 1,
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0xF => (cpuid_result.edx & 0x0000_0002) >> 1,
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// Reports valid ResID starting at bit position 1 of EBX.
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// Reports valid ResID starting at bit position 1 of EBX.
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// EBX Bit 00: Reserved.
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// EBX Bit 00: Reserved.
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// Bit 01: Supports L3 Cache Allocation Technology if 1.
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// Bit 01: Supports L3 Cache Allocation Technology if 1.
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@ -35,8 +35,8 @@ static bool is_cpuidinfo_equal(int leaf, t_cpuid_t *cpu, t_cpuid_t *cpu_sgx) {
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(cpu->ecx == cpu_sgx->ecx) &&
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(cpu->ecx == cpu_sgx->ecx) &&
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(cpu->edx == cpu_sgx->edx));
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(cpu->edx == cpu_sgx->edx));
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}
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}
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/* Leaf 0BH CPUID.EDX is related with logical processor. */
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/* Leaf 0BH and 06H CPUID.EDX is related with logical processor. */
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if (leaf == 0xB) {
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if (leaf == 0xB || leaf == 0x6) {
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return ((cpu->eax == cpu_sgx->eax) &&
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return ((cpu->eax == cpu_sgx->eax) &&
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(cpu->ebx == cpu_sgx->ebx) &&
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(cpu->ebx == cpu_sgx->ebx) &&
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(cpu->ecx == cpu_sgx->ecx));
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(cpu->ecx == cpu_sgx->ecx));
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